UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1637
UPD70F3786GJ-GAE-AX
Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet
1.UPD70F3778GF-GAT-AX.pdf
(1817 pages)
Specifications of UPD70F3786GJ-GAE-AX
Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
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Company:
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
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28.3.4 Reset operation by low-voltage detector
system reset is executed (when the LVIM.LVIMD bit is set to 1), and the hardware is initialized to the initial status.
LVI detection voltage.
Main clock oscillator (f
Subclock oscillator (f
Internal oscillator (f
Peripheral clock (f
Internal system clock (f
CPU clock (f
CPU
WDT2
Internal RAM
I/O lines (ports/alternate-function
pins)
On-chip peripheral I/O register
LVI
On-chip peripheral functions other
than above
If the supply voltage falls below the voltage detected by the low-voltage detector when LVI operation is enabled, a
The reset status lasts from when a supply voltage drop has been detected until the supply voltage rises above the
The main clock oscillator is stopped during the reset period.
When the LVIMD bit = 0, an interrupt request signal (INTLVI) is generated if a low voltage is detected.
Remark
CPU
For the reset timing of the low-voltage detector, see CHAPTER 30 LOW-VOLTAGE DETECTOR (LVI).
)
Item
XX
Table 28-4. Hardware Status During Reset Operation by Low-Voltage Detector
R
)
to f
XT
X
)
)
XX
XX
),
/1,024)
Oscillation stops
Oscillation continues
Oscillation stops
Operation stops
Operation stops
Initialized
Operation stops (initialized to 0)
Undefined if power-on reset or CPU access and reset input conflict (data is damaged).
Otherwise value immediately after reset input is retained.
High impedance
Setting retains
Operation stops
Initialized to specified status, OCDM register retains its value.
CHAPTER 28 RESET FUNCTIONS
User’s Manual U19601EJ2V0UD
During Reset
Oscillation starts
Oscillation starts
Operation starts after securing oscillation
stabilization time
Operation starts after securing oscillation
stabilization time (initialized to f
Program execution starts after securing
oscillation stabilization time
Counts up from 0 with internal oscillation
clock as source clock.
Operation can be started after securing
oscillation stabilization time.
After Reset
XX
/8)
1635
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