UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 308

• Manufacturer Part Number: UPD70F3786GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3-E 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Er

Specifications of UPD70F3786GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 124K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

TOAAn0 and TOAAn1 pins are inverted. When the count value of the 16-bit counter later matches the set value of the
TAAnCCRm register, a compare match interrupt request signal (INTTAAnCCm) is generated, and the output signal of
the TOAAnm pin is inverted.
generates an overflow interrupt request signal (INTTAAnOV) at the next clock, is cleared to 0000H, and continues
counting. At this time, the overflow flag (TAAnOPT0.TAAnOVF bit) is also set to 1. Clear the overflow flag to 0 by
executing the CLR instruction by software.
at that time, and compared with the count value.
306
When the TAAnCE bit is set to 1, 16-bit timer/event counter AA starts counting, and the output signals of the
The 16-bit counter continues counting in synchronization with the count clock. When it counts up to FFFFH, it
The TAAnCCRm register can be rewritten while the counter is operating. If it is rewritten, the new value is reflected
INTTAAnCC0 signal
INTTAAnCC1 signal
TAAnCCR1 register
TAAnCCR0 register
TOAAn0 pin output
TOAAn1 pin output
INTTAAnOV signal
Remark
16-bit counter
TAAnOVF bit
TAAnCE bit
Figure 7-34. Basic Timing in Free-Running Timer Mode (Compare Function)
FFFFH
0000H
n = 0 to 5
m = 0, 1
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
D
10
D
00
D
Cleared to 0 by
CLR instruction
10
User’s Manual U19601EJ2V0UD
D
00
D
10
D
00
CLR instruction
Cleared to 0 by
D
11
D
01
Cleared to 0 by
CLR instruction
D
11
D
D
D
01
01
11
CLR instruction
Cleared to 0 by
D
11