ATMEGA323L-4AI Atmel, ATMEGA323L-4AI Datasheet - Page 138
ATMEGA323L-4AI
Manufacturer Part Number
ATMEGA323L-4AI
Description
IC AVR MCU 32K LV 4MZ IND 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA323L-4PC.pdf
(247 pages)
Specifications of ATMEGA323L-4AI
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA323L4AI
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Port A as General Digital I/O
Port A Schematics
138
ATmega323(L)
All 8-bits in Port A are equal when used as digital I/O pins.
PAn, General I/O pin: The DDAn bit in the DDRA Register selects the direction of this
pin, if DDAn is set (one), PAn is configured as an output pin. If DDAn is cleared (zero),
PAn is configured as an input pin. If PORTAn is set (one) when the pin configured as an
input pin, the MOS pull up resistor is activated. To switch the pull up resistor off, the
PORTAn has to be cleared (zero), the pin has to be configured as an output pin, or the
PUD bit has to be set. The Port A pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Table 48. DDAn Effects on Port A Pins
Note:
Note that all port pins are synchronized. The synchronization latches are not shown in
the figure.
Figure 66. Port A Schematic Diagrams (Pins PA0 - PA7)
DDAn
0
0
0
1
1
1. n: 7,6…0, pin number.
PORTAn
PDn
0
1
1
0
1
MOS
PULL-
UP
WP:
WD:
RL:
RP:
RD:
n:
PUD: PULL-UP DISABLE
(in SFIOR)
WRITE PORTA
WRITE DDRA
READ PORTA LATCH
READ PORTA PIN
READ DDRA
0-7
PUD
X
0
1
X
X
PWRDN
Output
Output
Input
Input
Input
I/O
PUD
(1)
Pull Up
Yes
No
No
No
No
RL
RP
Comment
Tri-state (Hi-Z)
Tri-state (Hi-Z)
PAn will source current if ext. pulled
low.
Push-pull Zero Output
Push-pull One Output
TO ADC MUX
Q
Q
PORTAn
RESET
RESET
DDAn
WD
WP
RD
C
C
D
D
ADCn
1457G–AVR–09/03
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