AT91FR40161-CI Atmel, AT91FR40161-CI Datasheet - Page 12

• Manufacturer Part Number: AT91FR40161-CI
• Description: IC MCU ARM7 2M FLASH 120-BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91FR40161-CI

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: WDT
• Number Of I /o: 32
• Program Memory Size: 2MB (1M x 16)
• Program Memory Type: FLASH
• Ram Size: 136K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 120-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

12
AT94FR40161
A separate Flash memory reset input pin (NRSTF) is provided for maximum flexibility,
enabling the reset operation to adapt to the application. When this input is at a logic high
level, the memory is in its standard operating mode; a low level on this input halts the
current memory operation and puts its outputs in a high impedance state.
The Flash memory features data polling to detect the end of a program cycle. While a
program cycle is in progress, an attempted read of the last word written will return the
complement of the written data on I/O7. An open-drain NBUSY output pin provides
another method of detecting the end of a program or erase cycle. This pin is pulled low
while program and erase cycles are in progress and is released at the completion of the
cycle. A toggle bit feature provides a third means of detecting the end of a program or
erase cycle.
The Flash memory is segmented into two memory planes. Reads from one memory
plane may be performed even while program or erase functions are being executed in
the other memory plane. This feature enhances performance by not requiring the sys-
tem to wait for a program or erase cycle to complete before a read may be performed.
The Flash memory is divided into 39 sectors for erase operations. To further enhance
device flexibility, an Erase Suspend feature is offered. This feature puts the erase cycle
on hold for an indefinite period and allows the user to read data from, or to write data to,
any other sector within the same memory plane. There is no need to suspend an erase
cycle if the data to be read is in the other memory plane.
The device has the capability to protect data stored in any sector. Once the data protec-
tion for a sector is enabled, the data in that sector cannot be changed while input levels
lie between ground and V
An optional VPP pin is available to enhance program/erase times.
A 6-byte command sequence (Enter Single Pulse Program Mode) allows the device to
be written to directly, using single pulses on the write control lines. This mode (Single-
pulse Programming) is exited by powering down the device or by pulsing the NRSTF pin
low for a certain duration
The following hardware features protect against inadvertent programming of the Flash
memory:
•
•
•
•
See the AT49BV1604A/1614A(T) 2-Mbyte (1M x 16/2M x 8) 3-volt Only Flash Memory
Datasheet for further details on Flash operation and electrical characteristics.
Note:
V
V
automatically time out a certain duration
Program Inhibit – holding any one of OE low, CE high or WE high inhibits program
cycles.
Noise Filter – pulses of less than a certain duration
not initiate a program cycle.
DD
DD
1. Defined in the AT49BV1614A Flash Memory Datasheet, Atmel lit° 1411.
Sense – if V
Power-on Delay – once V
DD
is below a certain level
(1)
DD
and then bringing it back to V
.
DD
has reached the V
(1)
(1)
before programming.
, the program function is inhibited.
(1)
DD
DD
on the WE or CE inputs will
sense level, the device will
.
6040B–ATARM–03/04