ATMEGA168-20PI Atmel, ATMEGA168-20PI Datasheet - Page 269
![IC AVR MCU 16K 20MHZ 28DIP](/photos/7/21/72189/453-28-dip_sml.jpg)
ATMEGA168-20PI
Manufacturer Part Number
ATMEGA168-20PI
Description
IC AVR MCU 16K 20MHZ 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA168-20PI
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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26.4
26.4.1
26.4.2
2545S–AVR–07/10
Read-While-Write and No Read-While-Write Flash Sections
RWW – Read-While-Write Section
NRWW – No Read-While-Write Section
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot Loader soft-
ware update is dependent on which address that is being programmed. In addition to the two
sections that are configurable by the BOOTSZ Fuses as described above, the Flash is also
divided into two fixed sections, the Read-While-Write (RWW) section and the No Read-While-
Write (NRWW) section. The limit between the RWW- and NRWW sections is given in
7 on page 280
• When erasing or writing a page located inside the RWW section, the NRWW section can be
• When erasing or writing a page located inside the NRWW section, the CPU is halted during the
Note that the user software can never read any code that is located inside the RWW section dur-
ing a Boot Loader software operation. The syntax “Read-While-Write section” refers to which
section that is being programmed (erased or written), not which section that actually is being
read during a Boot Loader software update.
If a Boot Loader software update is programming a page inside the RWW section, it is possible
to read code from the Flash, but only code that is located in the NRWW section. During an on-
going programming, the software must ensure that the RWW section never is being read. If the
user software is trying to read code that is located inside the RWW section (that is, by a
call/jmp/lpm or an interrupt) during programming, the software might end up in an unknown
state. To avoid this, the interrupts should either be disabled or moved to the Boot Loader sec-
tion. The Boot Loader section is always located in the NRWW section. The RWW Section Busy
bit (RWWSB) in the Store Program Memory Control and Status Register (SPMCSR) will be read
as logical one as long as the RWW section is blocked for reading. After a programming is com-
pleted, the RWWSB must be cleared by software before reading code located in the RWW
section.
details on how to clear RWWSB.
The code located in the NRWW section can be read when the Boot Loader software is updating
a page in the RWW section. When the Boot Loader code updates the NRWW section, the CPU
is halted during the entire Page Erase or Page Write operation.
Table 26-1.
Which Section does the Z-
read during the operation.
entire operation.
pointer Address during
the Programming?
NRWW Section
RWW Section
See “SPMCSR – Store Program Memory Control and Status Register” on page 282.
Read-While-Write Features
and
Figure 26-2 on page
Which Section can be
Programming?
NRWW Section
read during
None
271. The main difference between the two sections is:
CPU Halted?
ATmega48/88/168
Yes
No
Read-While-Write
Supported?
Yes
No
Table 26-
269
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