PIC16F716-I/ML Microchip Technology, PIC16F716-I/ML Datasheet - Page 61

IC PIC MCU FLASH 2KX14 28QFN

PIC16F716-I/ML

Manufacturer Part Number
PIC16F716-I/ML
Description
IC PIC MCU FLASH 2KX14 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F716-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
8.3.10
In Half-Bridge applications where all power switches
are modulated at the PWM frequency, the power
switches normally require more time to turn off than to
turn on. If both the upper and lower power switches are
switched at the same time (one turned on, and the
other turned off), both switches may be on for a short
period of time until one switch completely turns off.
During this brief interval, a very high current (shoot-
through current) will flow through both power switches,
shorting the bridge supply. To avoid this potentially
destructive shoot-through current from flowing during
switching, turning on either of the power switches is
normally delayed to allow the other switch to
completely turn off.
In Half-Bridge mode, a digitally programmable dead-
band delay is available to avoid shoot-through current
from destroying the bridge power switches. The delay
occurs at the signal transition from the non-active state
to the active state. See Figure 8-8 for illustration. The
lower seven bits of the associated PWM1CON register
(Register 8-3) sets the delay period in terms of
microcontroller instruction cycles (T
FIGURE 8-9:
© 2007 Microchip Technology Inc.
Standard Half-Bridge Circuit (“Push-Pull”)
PROGRAMMABLE DEAD-BAND
DELAY MODE
EXAMPLE OF HALF-BRIDGE APPLICATIONS
CY
or 4 T
P1A
P1B
OSC
).
FET
Driver
FET
Driver
FIGURE 8-8:
P1A
P1B
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
(2)
(2)
V+
V-
2: Output signals are shown as active-high.
(1)
td
Pulse Width
PR2 register.
Load
Period
td
EXAMPLE OF HALF-
BRIDGE PWM OUTPUT
+
V
-
+
V
-
PIC16F716
(1)
Period
DS41206B-page 59
(1)

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