AT87C52X2-3CSUL Atmel, AT87C52X2-3CSUL Datasheet - Page 39
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AT87C52X2-3CSUL
Manufacturer Part Number
AT87C52X2-3CSUL
Description
IC 8051 MCU 8K OTP 30MHZ 40DIP
Manufacturer
Atmel
Series
87Cr
Datasheet
1.TS87C52X2-VCA.pdf
(55 pages)
Specifications of AT87C52X2-3CSUL
Core Processor
8051
Core Size
8-Bit
Speed
30/20MHz
Connectivity
UART/USART
Peripherals
POR
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Figure 13. I
Figure 14. Operating I
Figure 15. I
4184G–8051–09/06
7. For other values, please contact your sales office.
8. Operating I
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total I
If I
than the listed test conditions.
V
V
would be slightly higher if a crystal oscillator is used. Measurements are made with OTP products when possible, which is
the worst case.
CC
CC
SS
IH
OL
= V
+ 0.5V,
Test Condition, under reset
Test Condition, Idle Mode
exceeds the test condition, V
CC
- 0.5V; XTAL2 N.C.; EA = Port 0 = V
CC
CC
is measured with all output pins disconnected; XTAL1 driven with T
OL
Test Condition
for all output pins: 71 mA
Reset = Vss after a high pulse
during at least 24 clock cycles
Reset = Vss after a high pulse
during at least 24 clock cycles
OL
CLOCK
SIGNAL
CLOCK
SIGNAL
CLOCK
SIGNAL
may exceed the related specification. Pins are not guaranteed to sink current greater
(NC)
(NC)
(NC)
V
CC
CC
; RST = V
RST
XTAL2
XTAL1
V
RST
XTAL2
XTAL1
V
V
RST
XTAL2
XTAL1
SS
SS
SS
SS
V
V
V
EA
EA
EA
CC
CC
CC
P0
. The internal ROM runs the code 80 FE (label: SJMP label). I
I
I
P0
I
P0
CC
CC
CC
V
V
V
CC
CC
CC
V
V
V
CC
CC
CC
All other pins are disconnected.
All other pins are disconnected.
All other pins are disconnected.
CLCH
, T
CHCL
= 5 ns (see Figure 17.), V
TS8xCx2X2
IL
39
CC
=