AT32UC3A0512-ALUR Atmel, AT32UC3A0512-ALUR Datasheet - Page 219
AT32UC3A0512-ALUR
Manufacturer Part Number
AT32UC3A0512-ALUR
Description
MCU 32BIT 512KB FLASH 144-LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A0512-ALUR
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Otherwise, the following equations determine the delay:
If FDIV is 0:
If FDIV is 1:
• DLYBCT: Delay Between Consecutive Transfers
This field defines the delay between two consecutive transfers with the same peripheral without removing the chip select.
The delay is always inserted after each transfer and before removing the chip select if needed.
When DLYBCT equals zero, no delay between consecutive transfers is inserted and the clock keeps its duty cycle over the
character transfers.
Otherwise, the following equation determines the delay:
If FDIV is 0:
If FDIV is 1:
N = 32
32058J-AVR32-04/11
Delay Before SPCK
Delay Before SPCK
Delay Between Consecutive Transfers
Delay Between Consecutive Transfers
Note:
N = 32
=
=
DLYBS
------------------ - -
N
---------------------------- - -
MCK
×
MCK
DLYBS
=
=
32
----------------------------------- -
32
---------------------------------------------- - -
×
×
MCK
DLYBCT
N
MCK
×
DLYBCT
+
---------------- - -
2MCK
SCBR
+
N
------------------------ -
2MCK
×
SCBR
AT32UC3A
219
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