AT32UC3A0512-ALUR Atmel, AT32UC3A0512-ALUR Datasheet - Page 450
AT32UC3A0512-ALUR
Manufacturer Part Number
AT32UC3A0512-ALUR
Description
MCU 32BIT 512KB FLASH 144-LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A0512-ALUR
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Table 29-5.
29.5.13.1
32058J–AVR32–04/11
Pin Name
ETXCK_EREFCK
ECRS
ECOL
ERXDV
ERX0 - ERX3
ERXER
ERXCK
ETXEN
ETX0-ETX3
ETXER
RMII Transmit and Receive Operation
Pin Configuration
ETXCK: Transmit Clock
ECRS: Carrier Sense
ECOL: Collision Detect
ERXDV: Data Valid
ERX0 - ERX3: 4-bit Receive Data
ERXER: Receive Error
ERXCK: Receive Clock
ETXEN: Transmit Enable
ETX0 - ETX3: 4-bit Transmit Data
ETXER: Transmit Error
The MII and RMII interface are capable of both 10Mb/s and 100Mb/s data rates as described in
the IEEE 802.3u standard. The signals used by the MII and RMII interfaces are described in
Table
The intent of the RMII is to provide a reduced pin count alternative to the IEEE 802.3u MII. It
uses 2 bits for transmit (ETX0 and ETX1) and two bits for receive (ERX0 and ERX1). There is a
Transmit Enable (ETXEN), a Receive Error (ERXER), a Carrier Sense (ECRS_DV), and a 50
MHz Reference Clock (ETXCK_EREFCK) for 100Mb/s data rate.
The same signals are used internally for both the RMII and the MII operations. The RMII maps
these signals in a more pin-efficient manner. The transmit and receive bits are converted from a
4-bit parallel format to a 2-bit parallel scheme that is clocked at twice the rate. The carrier sense
and data valid signals are combined into the ECRSDV signal. This signal contains information
on carrier sense, FIFO status, and validity of the data. Transmit error bit (ETXER) and collision
detect (ECOL) are not used in RMII mode.
29-5.
MII
EREFCK: Reference Clock
ECRSDV: Carrier Sense/Data Valid
ERX0 - ERX1: 2-bit Receive Data
ERXER: Receive Error
ETXEN: Transmit Enable
ETX0 - ETX1: 2-bit Transmit Data
RMII
AT32UC3A
450
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