AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 345
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
AT91SAM9261-CJ-999
Manufacturer Part Number
AT91SAM9261-CJ-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9261-CJ-999.pdf
(749 pages)
Specifications of AT91SAM9261-CJ-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
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Part Number
Manufacturer
Quantity
Price
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29.6.19
Name:
Addresses: 0xFFFFF454 (PIOA), 0xFFFFF654 (PIOB), 0xFFFFF854 (PIOC)
Access Type:Write-only
• P0-P31: Multi Drive Disable.
0 = No effect.
1 = Disables Multi Drive on the I/O line.
29.6.20
Name:
Addresses: 0xFFFFF458 (PIOA), 0xFFFFF658 (PIOB), 0xFFFFF858 (PIOC)
Access Type:Read-only
• P0-P31: Multi Drive Status.
0 = The Multi Drive is disabled on the I/O line. The pin is driven at high and low level.
1 = The Multi Drive is enabled on the I/O line. The pin is driven at low level only.
6062M–ATARM–23-Mar-09
P31
P23
P15
P31
P23
P15
P7
P7
31
23
15
31
23
15
7
7
PIO Multi-driver Disable Register
PIO Multi-driver Status Register
PIO_MDDR
PIO_MDSR
P30
P22
P14
P30
P22
P14
P6
P6
30
22
14
30
22
14
6
6
P29
P21
P13
P29
P21
P13
P5
P5
29
21
13
29
21
13
5
5
P28
P20
P12
P28
P20
P12
P4
P4
28
20
12
28
20
12
4
4
P27
P19
P11
P27
P19
P11
P3
P3
27
19
11
27
19
11
3
3
AT91SAM9261 Preliminary
P26
P18
P10
P26
P18
P10
P2
P2
26
18
10
26
18
10
2
2
P25
P17
P25
P17
P9
P1
P9
P1
25
17
25
17
9
1
9
1
P24
P16
P24
P16
P8
P0
P8
P0
24
16
24
16
8
0
8
0
345
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