MC68HC705B16CFN Freescale Semiconductor, MC68HC705B16CFN Datasheet - Page 51
Manufacturer Part Number
IC MCU 2.1MHZ 15K OTP 52-PLCC
Specifications of MC68HC705B16CFN
Number Of I /o
Program Memory Size
15KB (15K x 8)
Program Memory Type
256 x 8
352 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
-40°C ~ 85°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
(1) The POR bit is set each time there is a power-on reset.
(2) The state of the WDOG bit after reset is dependent on the mask option selected; 1=watchdog enabled, 0=watchdog disabled.
POR — Power-on reset bit (see
This bit is set each time the device is powered on. Therefore, the state of the POR bit allows the
user to make a software distinction between a power-on and an external reset. This bit cannot be
set by software and is cleared by writing it to zero.
INTP, INTN — External interrupt sensitivity options (see
These two bits allow the user to select which edge the IRQ pin will be sensitive to (see
Both bits can be written to only while the I-bit is set, and are cleared by power-on or external reset,
thus the device is initialised with negative edge and low level sensitivity.
INTE — External interrupt enable (see
The INTE bit can be written to only while the I-bit is set, and is set by power-on or external reset,
thus enabling the external interrupt function.
0 (clear) –
0 (clear) –
A power-on reset has occurred.
No power-on reset has occurred.
External interrupt function (IRQ) enabled.
External interrupt function (IRQ) disabled.
MEMORY AND REGISTERS
Table 3-3 IRQ sensitivity
Negative edge and low level sensitive
Negative edge only
Positive edge only
Positive and negative edge sensitive