MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 141

IC MCU 8MHZ 32K FLASH 40-DIP

MC68HC908GP32CP

Manufacturer Part Number
MC68HC908GP32CP
Description
IC MCU 8MHZ 32K FLASH 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP32CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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MC68HC908GP32
MOTOROLA
MC68HC08GP32
SCIBDSRC — SCI Baud Rate Clock Source Bit
COPRS — COP Rate Select Bit
LVISTOP — LVI Enable in Stop Mode Bit
LVIRSTD — LVI Reset Disable Bit
LVIPWRD — LVI Power Disable Bit
LVI5OR3 — LVI 5-V or 3-V Operating Mode Bit
SCIBDSRC controls the clock source used for the SCI. The setting of
this bit affects the frequency at which the SCI operates.
COPRS selects the COP timeout period. Reset clears COPRS.
Section 9. Computer Operating Properly
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the
LVI to operate during stop mode. Reset clears LVISTOP. (See
3.6.2 Stop
LVIRSTD disables the reset signal from the LVI module.
Section 14. Low-Voltage Inhibit
LVIPWRD disables the LVI module.
Inhibit
LVI5OR3 selects the voltage operating mode of the LVI module.
Section 14. Low-Voltage Inhibit
for the LVI should match the operating V
Electrical Specifications
the modes.
1 = Internal data bus clock used as clock source for SCI
0 = External oscillator used as clock source for SCI
1 = COP timeout period = 2
0 = COP timeout period = 2
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module resets disabled
0 = LVI module resets enabled
1 = LVI module power disabled
0 = LVI module power enabled
1 = LVI operates in 5-V mode.
0 = LVI operates in 3-V mode.
Rev. 6
Configuration Register (CONFIG)
(LVI).)
Mode.)
for the LVI’s voltage trip points for each of
13
18
– 2
– 2
(LVI).) The voltage mode selected
(LVI).)
4
4
(See Section 14. Low-Voltage
CGMXCLK cycles
CGMXCLK cycles
DD
Configuration Register (CONFIG)
.
(COP).)
See Section 23.
Functional Description
Technical Data
(See
(See
(See
139

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