MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 121

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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4.4.2 INT Signal Functions
4.5 Signal Descriptions
4.5.1 Reset Signals
4.5.1.1 Reset In (RESET)
4.5.1.2 Reset Out (RSTOUT)
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
The INT signals have these multiple functions:
If the SZEN or PSTEN bits are set during emulation mode, then the
corresponding edge port INT functions are lost and will not be emulated
externally.
The default reset values for PUPSCI1 and PUPSCI0 will be 0. Thus, the
pullup function is disabled by default.
This subsection provides a brief description of the signals. For more
detailed information, reference the module section.
These signals are used to either reset the chip or as a reset indication.
This active-low input signal is used as an external reset request.
This active-low output signal is an indication that the internal reset
controller has reset the chip. When RSTOUT is active, the user may
drive override options on the data bus. RSTOUT is three-stated in
phase-lock loop (PLL) test mode.
RSTOUT may also be used to reflect an indication of an internal interrupt
request.
Freescale Semiconductor, Inc.
For More Information On This Product,
If the SZEN bit in the chip configuration register is set, then
INT[7:6] will be used to reflect the state of the TSIZ[1:0] signals
from the M•CORE.
If the PSTEN bit in the chip configuration register is set, then
INT[5:2] will be used to reflect the state of the PSTAT[3:0] signals
from the M•CORE.
Go to: www.freescale.com
Signal Description
Signal Descriptions
Signal Description
Technical Data
121

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