MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 143

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

6.1 Contents
6.2 Introduction
MMC2107 – Rev. 2.0
MOTOROLA
Technical Data — MMC2107
Section 6. M•CORE M210 Central Processor Unit (CPU)
6.2
6.3
6.4
6.5
6.6
6.7
6.8
The M•CORE M210 central processor unit (CPU) architecture is one of
the most compact, full 32-bit core implementations available. The
pipelined reduced instruction set computer (RISC) execution unit uses
16-bit instructions to achieve maximum speed and code efficiency, while
conserving on-chip memory resources. The instruction set is designed
to support high-level language implementation. A non-intrusive resident
debugging system supports product development and in-situ testing.
The M•CORE technology library also encompasses a full complement of
on-chip peripheral modules designed specifically for embedded control
applications.
Total system power consumption is determined by all the system
components, rather than the processor core alone. In particular, memory
power consumption (both on-chip and external) is a dominant factor in
total power consumption of the core plus memory subsystem. With this
in mind, the M•CORE instruction set architecture trades absolute
performance capability for reduced total energy consumption. This is
accomplished while maintaining an acceptably high level of performance
at a given clock frequency.
Freescale Semiconductor, Inc.
M•CORE M210 Central Processor Unit (CPU)
For More Information On This Product,
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
Microarchitecture Summary . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
Data Format Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Operand Addressing Capabilities . . . . . . . . . . . . . . . . . . . . . . 150
Instruction Set Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
Go to: www.freescale.com
Technical Data
143