MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 182

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Non-Volatile Memory FLASH (CMFR)
9.4 Modes of Operation
9.4.1 Stop Mode
9.4.2 Disabled Mode
Technical Data
182
This subsection describes the two modes of operation:
When the FSTOP bit in the CMFR module configuration register
(CMFRMCR) register is set, the CMFR enters a low-power operation
mode. Write to FSTOP bit is allowed only when SES = 0 in the CMFR
high-voltage control register (no high-voltage operations). When the
FSTOP bit is set, only CMFRMCR can be accessed, accesses to the
array are ignored, and accesses to other registers are terminated with
bus errors. To prevent unpredictable behavior it is recommended to
change this bit separately. The CMFR requires a recovery time of 16
clocks after exiting stop mode. This means that if a read access to the
array is done immediately after writing FSTOP = 0, the access is
completed after 16 clocks.
When the DIS bit in CMFRMCR is set, the array is disabled and the BIU
does not respond to array accesses. Write to DIS bit is allowed only
when SES = 0 (no high-voltage operations). Disabling the CMFR does
not place the module in the lowest power consumption mode like stop
mode, but does place the CMFR in a safe state and prevents the CMFR
from conflicting on the internal bus during an external boot. There is no
recovery time required when re-enabling the CMFR.
For details of the CMFR module configuration register (CMFRMCR) see
9.7.1.1 CMFR Module Configuration Register
High-Voltage Control
1. Stop mode
2. Disabled mode
Freescale Semiconductor, Inc.
For More Information On This Product,
Non-Volatile Memory FLASH (CMFR)
Go to: www.freescale.com
Register.
and
9.7.1.3 CMFR
MMC2107 – Rev. 2.0
MOTOROLA