MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 204

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Non-Volatile Memory FLASH (CMFR)
9.7.2.2 Program Page Buffers
Technical Data
204
Each access to the array determines if the requested location is within
the current pages. If the requested location is not within the read page
buffers, the appropriate read page buffer is made invalid and a new page
of information is fetched from the array. The page buffer address is
updated and status is made valid. If the requested location is within one
of the current page buffers or has been fetched from the array, the
selected bytes are transferred to the CPU, completing the access. Array
accesses that make the page buffer(s) invalid are off-page reads that
require two system clocks. Array accesses that do not make the page
buffer(s) invalid are on-page reads that require one system clock.
The CMFR can program up to eight 64-byte pages at one time. Each
program page buffer is associated with one array block. All program
page buffers share the same block offset address, stored in the BIU. The
block offset address is extracted from the address of the first
programming write. To select the array block to be programmed, the
program page buffers use BLOCK[7:0]. The data programmed in each
array block is determined by the programming writes to the program
buffer for each block. All program buffer data is unique whereas the
program page offset address is shared by all blocks.
An array block is selected for programming if the corresponding BLOCK
bit is a 1. If BLOCK[M] = 1, then array block[M] is programmed. If
BLOCK[M] = 0, then array block[M] is not programmed. The program
page buffers are written regardless of the state of the BLOCK bits, but
high-voltage is not applied to blocks for which BLOCK[M] = 0.
Bits in the program page buffers select the non-programmed state if
SES = 0. During a program margin read, the program buffers update bits
to the non-programmed state for bits that correspond to array bits that
the program margin read has determined are programmed.
Freescale Semiconductor, Inc.
For More Information On This Product,
Non-Volatile Memory FLASH (CMFR)
Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA