MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 210

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Non-Volatile Memory FLASH (CMFR)
Technical Data
210
State
S1
S2
Normal operation: Normal array reads and
First program hardware interlock write:
register accesses. Block protect information
and pulse width timing control can be
modified.
Normal read operation. Array accepts
programming writes. Normal register
accesses. CMFRCTL write cannot change
EHV. If write is to a register other than
CMFRMCR, no data is stored in program
page buffers; CMFR remains in S2.
Table 9-7. Program Interlock State Descriptions
Mode
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 9-8. Program State Diagram
RESET
Non-Volatile Memory FLASH (CMFR)
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T1
S2
S1
T2
State
Next
S2
S1
S3
T9
T3
T7
T2 Write ERASE = 0 and SES = 1
T1 Write SES = 0 or master reset
T3
T6
Hardware interlock: Successful programming
write to any array location. Latches selected
data word into programming page buffer;
address latched to select location to
program. Bit that has been written remains
in program buffer until another write to it, or
SES is cleared, or a program margin read
determines bit needs no modification by
program operation. If write is to a register
(except CMFRMCR), no data is stored in
program page buffers, and CMFR remains
in S2. Writing to CMFRMCR does not allow
array to be programmed.
T8
S3
S4
S5
T4
T5
Transition Requirement
MMC2107 – Rev. 2.0
MOTOROLA