MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 316

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Timer Modules (TIM1 and TIM2)
Technical Data
316
NOTE:
The timer prescaler generates the divided-by-64 clock. If the timer is not
active, there is no divided-by-64 clock.
To operate in gated time accumulation mode:
CLK[1:0] — Clock Select Bits
PAOVI — Pulse Accumulator Overflow Interrupt Enable Bit
PAI — Pulse Accumulator Input Interrupt Enable Bit
In gated time accumulation mode (PAMOD = 1):
1. Apply logic 0 to RESET pin.
2. Initialize registers for pulse accumulator mode test.
3. Apply appropriate level to PAI pin.
4. Enable timer.
CLK[1:0] select the timer counter input clock as shown in
PAOVI enables the PAOVF flag to generate interrupt requests.
PAI enables the PAIF flag to generate interrupt requests.
Freescale Semiconductor, Inc.
1. Changing the CLKx bits causes an immediate change in the timer counter clock input.
2. When PAE = 0, the timer prescaler clock is always the timer counter clock.
For More Information On This Product,
1 = Low PAI input enables divided-by-64 clock to pulse
0 = High PAI input enables divided-by-64 clock to pulse
1 = PAOVF interrupt requests enabled
0 = PAOVF interrupt requests disabled
1 = PAIF interrupt requests enabled
0 = PAIF interrupt requests disabled
CLK[1:0]
00
01
10
11
accumulator and trailing rising edge on PAI sets PAIF flag.
accumulator and trailing falling edge on PAI sets PAIF flag.
Timer Modules (TIM1 and TIM2)
Go to: www.freescale.com
Table 15-6. Clock Selection
Timer Counter Clock
Timer prescaler clock
PACLK/65536
PACLK/256
PACLK
(2)
(1)
MMC2107 – Rev. 2.0
Table
MOTOROLA
15-6.

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