MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 376

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Serial Peripheral Interface Module (SPI)
17.7.1 SPI Control Register 1
Technical Data
376
Address: 0x00cb_0000
Reset:
Read: Anytime
Write: Anytime
SPIE — SPI Interrupt Enable Bit
SPE — SPI System Enable Bit
SWOM — SPI Wired-OR Mode Bit
Read:
Write:
The SPIE bit enables the SPIF and MODF flags to generate interrupt
requests. Reset clears SPIE.
The SPE bit enables the SPI and dedicates SPI port pins [3:0] to SPI
functions. When SPE is clear, the SPI system is initialized but in a
low-power disabled state. Reset clears SPE.
The SWOM bit configures the output buffers of SPI port pins [3:0] as
open-drain outputs. SWOM controls SPI port pins [3:0] whether they
are SPI outputs or general-purpose outputs. Reset clears SWOM.
Freescale Semiconductor, Inc.
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1 = SPIF and MODF interrupt requests enabled
0 = SPIF and MODF interrupt requests disabled
1 = SPI enabled
0 = SPI disabled
1 = Output buffers of SPI port pins [3:0] open-drain
0 = Output buffers of SPI port pins [3:0] CMOS drive
Serial Peripheral Interface Module (SPI)
SPIE
Bit 7
0
Figure 17-2. SPI Control Register 1 (SPICR1)
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SPE
6
0
SWOM
5
0
MSTR
4
0
CPOL
3
0
CPHA
2
1
MMC2107 – Rev. 2.0
SSOE
1
0
MOTOROLA
LSBFE
Bit 0
0