MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 429

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
If a pause in a CCW is encountered in external gated mode for either
single-scan and continuous-scan mode, the pause flag will not set, and
execution continues without pausing. This has allowed for the added
definition of PF1 in the external gated modes.
In external gated single-scan and continuous-scan mode, the
definition of PF1 has been redefined. When the gate closes before the
end-of-queue 1 is reached, PF1 becomes set to indicate that an
incomplete scan has occurred. In single-scan mode, setting PF1 can
be used to cause an interrupt and software can then determine if
queue 1 should be enabled again. In either external gated mode,
setting PF1 indicates that the results for queue 1 have not been
collected during one scan (coherently).
PF1 is maintained by the QADC regardless of whether the
corresponding interrupts are enabled. The software may poll PF1 to
find out when the QADC has reached a pause in scanning a
queue.The software acknowledges that it has detected a pause flag
being set by writing a 0 to PF1 after the bit was last read as a 1.
See
Freescale Semiconductor, Inc.
External trigger single-scan
External trigger continuous-scan
Interval timer trigger single-scan
Interval timer continuous-scan
Software-initiated single-scan
Software-initiated continuous-scan
External gated single-scan
External gated continuous-scan
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
1 = Queue 1 has reached a pause or gate closed before
0 = Queue 1 has not reached a pause or gate has not closed before
Table 18-7
end-of-queue in gated mode.
end-of-queue in gated mode.
Go to: www.freescale.com
Scan Mode
for a summary of pause response in all scan modes.
Table 18-7. Pause Response
Queued Analog-to-Digital Converter (QADC)
Queue Operation
Continues
Continues
Continues
Continues
Pauses
Pauses
Pauses
Pauses
Register Descriptions
PF Asserts?
Yes
Yes
Yes
Yes
Yes
Yes
Technical Data
No
No
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