MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 444

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Queued Analog-to-Digital Converter (QADC)
18.9.2.2 Module Version Options
Technical Data
444
Figure 18-18
multiplexer chips connected to the QADC. The external multiplexer chips
select one of four analog inputs and connect it to one analog output,
which becomes an input to the QADC. The QADC provides two
multiplexed address signals — MA[1:0] — to select one of four inputs.
These inputs are connected to all four external multiplexer chips. The
analog output of the four multiplex chips are each connected to separate
QADC inputs (ANw, ANx, ANy, and ANz) as shown in
When the external multiplexed mode is selected, the QADC
automatically creates the MA output signals from the channel number in
each CCW. The QADC also converts the proper input channel (ANw,
ANx, ANy, and ANz) by interpreting the CCW channel number. As a
result, up to 16 externally multiplexed channels appear to the conversion
queues as directly connected signals. The software simply puts the
channel number of externally multiplexed channels into CCWs.
Figure 18-18
pins. When external multiplexing is selected, none of the MA pins can be
used for analog or digital inputs. They become multiplexed address
outputs and are unaffected by DDRQA[1:0].
The number of available analog channels varies, depending on whether
external multiplexing is used. A maximum of 16 analog channels are
supported by the internal multiplexing circuitry of the converter.
Table 18-12
with 0 to four external multiplexer chips.
1. The external trigger inputs are not shared with two analog input pins.
2. When external multiplexing is used, two input channels can be configured as multiplexed
No External
Freescale Semiconductor, Inc.
address outputs, and for each external multiplexer chip, one input channel is a multiplexed
analog input.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Mux
Directly Connected + External Multiplexed = Total Channels
8
Go to: www.freescale.com
shows the total number of analog input channels supported
shows the maximum configuration of four external
shows that the two MA signals may also be analog input
One External
Number of Analog Input Channels Available
Table 18-12. Analog Input Channels
5 + 4 = 9
Mux
Two External
4 + 8 = 12
Muxes
Three External
3 + 12 = 15
Muxes
MMC2107 – Rev. 2.0
Figure
Four External
2 + 16 = 18
(1), (2)
MOTOROLA
Muxes
18-18.

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