MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 45

• Manufacturer Part Number: MMC2107CFCPV33
• Description: IC MCU 33MHZ 128K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2107CFCPV33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Operating Supply Voltage: 0 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

MMC2107 – Rev. 2.0
MOTOROLA
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Freescale Semiconductor, Inc.
For More Information On This Product,
Two serial communications interfaces (SCI):
– Full-duplex operation
– Standard mark/space non-return-to-zero (NRZ) format
– 13-bit baud rate selection
– Programmable 8-bit or 9-bit data format
– Separately enabled transmitter and receiver
– Separate receiver and transmitter CPU interrupt requests
– Programmable transmitter output polarity
– Two receiver wakeup methods (idle line and address mark)
– Interrupt-driven operation with eight flags
– Receiver framing error detection
– Hardware parity checking
– 1/16 bit-time noise detection
– General-purpose input/output port
Two timers:
– Four 16-bit input capture/output compare channels
– 16-bit architecture
– 16-bit pulse accumulator
– Pulse widths variable from microseconds to seconds
– Prescaler
– Toggle-on-overflow feature for pulse-width modulator (PWM)
– Timer port pullups enabled on reset
Queued analog-to-digital converter (QADC):
– Eight analog input channels
– 10-bit resolution ±2 counts accuracy
– Minimum 7 s conversion time
– Internal sample and hold
– Programmable input sample time for various source
– Two conversion command queues with a total of 64 entries
– Subqueues possible using pause mechanism
– Queue complete and pause software interrupts available on
generation
impedances
both queues
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General Description
General Description
Technical Data
Features
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