MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 454

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Queued Analog-to-Digital Converter (QADC)
Technical Data
454
to have the pause bit set, to show the similarities of pause and
end-of-queue as terminations of queue execution.
Trigger events are described in
When a trigger event causes a CCW execution in progress to be
aborted, the aborted conversion is shown as a ragged end of a
shortened CCW rectangle.
The situation diagrams also show when key status bits are set.
Table 18-14
Below the queue execution flows are three sets of blocks that show the
status information that is made available to the software. The first two
rows of status blocks show the condition of each queue as:
The third row of status blocks shows the 4-bit QS status register field that
encodes the condition of the two queues. Two transition status cases,
Trigger
Trigger overrun
Freescale Semiconductor, Inc.
T1
T2
error (TOR)
For More Information On This Product,
CF flag
PF flag
Queued Analog-to-Digital Converter (QADC)
Idle
Active
Pause
Suspended (queue 2 only)
Trigger pending
Bit
Events that trigger queue 1 execution (external trigger, software-initiated
single-scan enable bit, or completion of the previous continuous loop)
Events that trigger queue 2 execution (external trigger, software-initiated
single-scan enable bit, timer period/interval expired, or completion of the
previous continuous loop)
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describes the status bits.
Set when the end of the queue is reached
Set when a queue completes execution up through a pause bit
Set when a new trigger event occurs before the queue is finished
serving the previous trigger event
Table 18-13. Trigger Events
Table 18-14. Status Bits
Table
Events
18-13.
Function
MMC2107 – Rev. 2.0
MOTOROLA

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