MMC2107CFCPV33 Freescale Semiconductor, MMC2107CFCPV33 Datasheet - Page 474

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MMC2107CFCPV33

Manufacturer Part Number
MMC2107CFCPV33
Description
IC MCU 33MHZ 128K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheet

Specifications of MMC2107CFCPV33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
4 bit
Operating Supply Voltage
0 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Queued Analog-to-Digital Converter (QADC)
18.10.7.2 External Trigger Continuous-Scan Mode
18.10.7.3 External Gated Continuous-Scan Mode
Technical Data
474
The QADC provides external trigger pins for both queues. When the
external trigger software-initiated continuous-scan mode is selected, a
transition on the associated external trigger pin initiates queue
execution. The polarity of the external trigger signal is programmable, so
that the software can select a mode which begins queue execution on
the rising or falling edge. Each CCW is read and the indicated
conversions are performed until an end-of-queue condition is
encountered. When the next external trigger edge is detected, the queue
execution begins again automatically. Software initialization is not
needed between trigger events.
When a pause bit is encountered in external trigger continuous-scan
mode, another trigger event is required for queue execution to continue.
Software involvement is not needed to enable queue execution to
continue from the paused state.
Some applications need to synchronize the sampling of analog channels
to external events. There are cases when it is not possible to use
software initiation of the queue scan sequence, since interrupt response
times vary.
The QADC provides external gating for queue 1 only. When external
gated continuous-scan mode is selected, the input level on the
associated external trigger pin enables and disables queue execution.
The polarity of the external gated signal is fixed so a high level opens the
gate and a low level closes the gate. Once the gate is open, each CCW
is read and the indicated conversions are performed until the gate is
closed. When the gate opens again, the queue execution automatically
begins again from the beginning of the queue. Software initialization is
not needed between trigger events. If a pause in a CCW is encountered,
the pause flag does not become set, and execution continues without
pausing.
The purpose of external gated continuous-scan mode is to continuously
collect digitized samples while the gate is open and to have the most
recent samples available. It is up to the programmer to ensure that the
queue is large enough so that a maximum gate open time will not reach
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Go to: www.freescale.com
MMC2107 – Rev. 2.0
MOTOROLA

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