N80C251TB24 Intel, N80C251TB24 Datasheet - Page 17

no-image

N80C251TB24

Manufacturer Part Number
N80C251TB24
Description
IC MPU 8-BIT 5V 24MHZ 44-PLCC
Manufacturer
Intel
Series
80Cr
Datasheet

Specifications of N80C251TB24

Rohs Status
RoHS non-compliant
Core Processor
MCS 251
Core Size
8-Bit
Speed
24MHz
Connectivity
SIO
Peripherals
PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
816721

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
N80C251TB24
Manufacturer:
INTEL
Quantity:
12 388
Part Number:
N80C251TB24
Manufacturer:
INTEL
Quantity:
3 342
Part Number:
N80C251TB24
Manufacturer:
Intel
Quantity:
10 000
Part Number:
N80C251TB24
Manufacturer:
INTEL
Quantity:
20 000
5.0
FF:FFFFH
FF:4000H
FF:3FFFH
FF:0000H
FE:FFFFH
FE:0000H
01:FFFFH
01:0000H
00:FFFFH
00:E000H
00:DFFFH
00:0420H
00:041FH
00:0080H
00:007FH
00:0020H
00:001FH
00:0000H
NOTES:
1. 18 address lines are bonded out (A15:0, A16:0, or A17:0 selected during chip configuration).
2. The special function registers (SFRs) and the register file have separate internal address spaces.
3. Data in this area is accessible by indirect addressing only.
4. Devices reset into internal or external starting locations depending on the state of EA# and configuration byte information
5. The 16-Kbyte ROM devices allow internal locations FF:2000H–FF:3FFFH to map into region 00:. In this case, if EA# = 1,
6. This reserved area returns indeterminate values.
7. Data is accessible by direct and indirect addressing.
8. Data is accessible by direct, indirect, and bit addressing.
9. Data is accessible by direct, indirect, and register addressing.
10. Eight addresses at the top of all external memory maps are reserved for current and future device configuration byte
FD:FFFFH
Address)
02:0000H
Internal
See EA#.
a data read to 00:E000H–00:FFFFH is redirected to internal ROM (see bit 1 in UCONFIG0). This is not available for 8-
Kbyte ROM devices.
information.
ADDRESS MAP
External Memory except the top eight bytes (FF:FFF8H–FF:FFFFH) which are
reserved for the configuration array.
External memory or on-chip nonvolatile memory (8Kbytes FF:0000H - FF:1FFFH,
16Kbytes FF:0000H - FF:3FFFH).
External Memory
Reserved
External Memory
External memory or with configuration bit EMAP# = 0, addresses in this range
access on-chip code memory in region FF: (16 Kbyte devices only).
External Memory
On-chip RAM (512 bytes 00:0020H - 00:021FH, 1024 bytes 00:0020H - 00:041FH)
On-chip RAM
Storage for R0–R7 of Register File
Table 8. 8xC251TB/TQ Address Map
8xC251TB/TQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER
Description
1, 3, 10
3, 4, 5
3
6
3
5, 7
7
7
8
2, 9
Notes
11

Related parts for N80C251TB24