DSP56F826BU80 Freescale Semiconductor, DSP56F826BU80 Datasheet - Page 11

• Manufacturer Part Number: DSP56F826BU80
• Description: IC DSP 80MHZ 31.5K FLASH 100LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxr

Specifications of DSP56F826BU80

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, SCI, SPI, SSI
• Peripherals: POR, WDT
• Number Of I /o: 46
• Program Memory Size: 67KB (33.5K x 16)
• Program Memory Type: FLASH
• Ram Size: 4.5K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 2.75 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

Freescale Semiconductor
(CLOCKIN)
(GPIOE0)
(GPIOE1)
(GPIOE2)
(GPIOE3)
(GPIOE4)
(GPIOE5)
(GPIOE6)
(GPIOE7)
Table 2-1 56F826 Signal and Package Information for the 100 Pin LQFP (Continued)
Signal
Name
CLKO
XTAL
A0
A1
A2
A3
A4
A5
A6
A7
Pin No.
62
65
24
23
22
21
18
17
16
15
Input/Output
Output
Output
Output
Type
Input
Crystal Oscillator Output—This output connects the internal crystal oscillator
output to an external crystal or ceramic resonator. If an external clock source
over 4MHz is used, XTAL must be used as the input and EXTAL connected to
V
External Clock Input—This input should be asserted when using an external
clock or ceramic resonator.
Clock Output—This pin outputs a buffered clock signal. By programming the
CLKO Select Register (CLKOSR), the user can select between outputting a
version of the signal applied to XTAL and a version of the device master clock at
the output of the PLL. The clock frequency on this pin can be disabled by
programming the CLKO Select Register (CLKOSR).
Address Bus—A0–A7 specify the address for external program or data memory
accesses.
Port E GPIO—These eight General Purpose I/O (GPIO) pins can be individually
programmed as input or output pins.
After reset, the default state is Address Bus.
SS . For more information, please refer to
56F826 Technical Data, Rev. 14
Description
Section
3.6.3.
Signals and Package Information
11