MC68HC908JB8JP Freescale Semiconductor, MC68HC908JB8JP Datasheet - Page 62
MC68HC908JB8JP
Manufacturer Part Number
MC68HC908JB8JP
Description
IC MCU FLASH 8BIT 8K 20-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908JB8JDWE.pdf
(286 pages)
Specifications of MC68HC908JB8JP
Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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Price
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MOT
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Part Number:
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FLASH Memory
4.9.1 Variables
4.9.2 ERASE Routine
Technical Data
62
The ROM-resident routines use three variables: CTRLBYT, CPUSPD
and LADDR; and one data buffer. The minimum size of the data buffer
is one byte and the maximum size is 64 bytes.
CPUSPD must be set before calling the ERASE or PROGRAM routine,
and should be set to four times the value of the CPU internal bus speed
in MHz. For example: for CPU speed of 3MHz, CPUSPD should be set
to 12.
The ERASE routine erases the entire FLASH memory. The routine does
not check for a blank range before or after erase.
CTRLBYT
Routine
Calling Address
Stack Use
Input
DATABUF
CPUSPD
Variable
LADDR
Table 4-2. ROM-Resident Routine Variables
FLASH Memory
$004C–$008B
$004A–$004B
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Address
ERASE
$FC06
5 Bytes
CPUSPD — CPU speed
HX —
CTRLBYT — Mass erase
$0048
$0049
Table 4-3. ERASE Routine
Mass erase if bit 6 = 1
Contains any address in the range to be
erased
Control byte for setting mass erase.
Timing adjustment for different CPU
speeds.
Last FLASH address to be programmed.
Data buffer for programming and verifying.
Description
Freescale Semiconductor
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