MC908AZ60ACFU Freescale Semiconductor, MC908AZ60ACFU Datasheet - Page 288

• Manufacturer Part Number: MC908AZ60ACFU
• Description: IC MCU FLASH 8.4MHZ 60K 64QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MSCAN Controller (MSCAN08)
23.13.2 MSCAN08 Module Control Register 1
LOOPB — Loop Back Self-Test Mode
WUPM — Wakeup Mode
CLKSRC — Clock Source
288
When this bit is set, the MSCAN08 performs an internal loop back which can be used for self-test
operation: the bit stream output of the transmitter is fed back to the receiver internally. The RxCAN
input pin is ignored and the TxCAN output goes to the recessive state (logic ‘1’). The MSCAN08
behaves as it does normally when transmitting and treats its own transmitted message as a message
received from a remote node. In this state the MSCAN08 ignores the bit sent during the ACK slot of
the CAN frame Acknowledge field to insure proper reception of its own message. Both transmit and
receive interrupt are generated.
This flag defines whether the integrated low-pass filter is applied to protect the MSCAN08 from
spurious wakeups (see
This flag defines which clock source the MSCAN08 module is driven from (see
1 = Activate loop back self-test mode
0 = Normal operation
1 = MSCAN08 will wake up the CPU only in cases of a dominant pulse on the bus which has a
0 = MSCAN08 will wake up the CPU after any recessive to dominant edge on the CAN bus.
1 = The MSCAN08 clock source is CGMOUT (see
0 = The MSCAN08 clock source is CGMXCLK/2 (see
length of at least t
Address:
The CMCR1 register can be written only if the SFTRES bit in the MSCAN08
module control register is set
Reset:
Read:
Write:
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
$0501
Bit 7
0
0
Figure 23-16. Module Control Register (CMCR1)
23.8.5 Programmable Wakeup
wup
= Unimplemented
.
6
0
0
5
0
0
NOTE
4
0
0
Figure
Function).
Figure
3
0
0
23-7).
23-7).
LOOPB
2
0
WUPM
1
0
23.10 Clock
Freescale Semiconductor
CLKSRC
Bit 0
0
System).