MC908AZ60ACFU Freescale Semiconductor, MC908AZ60ACFU Datasheet - Page 318

• Manufacturer Part Number: MC908AZ60ACFU
• Description: IC MCU FLASH 8.4MHZ 60K 64QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Timer Interface Module A (TIMA)
TRST — TIMA Reset Bit
PS[2:0] — Prescaler Select Bits
25.8.2 TIMA Counter Registers
The two read-only TIMA counter registers contain the high and low bytes of the value in the TIMA counter.
Reading the high byte (TACNTH) latches the contents of the low byte (TACNTL) into a buffer. Subsequent
reads of TACNTH do not affect the latched TACNTL value until TACNTL is read. Reset clears the TIMA
counter registers. Setting the TIMA reset bit (TRST) also clears the TIMA counter registers.
318
Setting this write-only bit resets the TIMA counter and the TIMA prescaler. Setting TRST has no effect
on any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIMA
counter is reset and always reads as logic 0. Reset clears the TRST bit.
These read/write bits select either the PTD6/ATD14/TACLK pin or one of the seven prescaler outputs
as the input to the TIMA counter as
1 = Prescaler and TIMA counter cleared
0 = No effect
Do not set the TSTOP bit before entering wait mode if the TIMA is required
to exit wait mode. Also, when the TSTOP bit is set and input capture mode
is enabled, input captures are inhibited until TSTOP is cleared.
When using the TSTOP to stop the timer counter, see if any timer flags are
set. If a timer flag is set, it must be cleared by clearing the TSTOP, then
clearing the flag, then setting the TSTOP again.
Setting the TSTOP and TRST bits simultaneously stops the TIMA counter
at a value of $0000.
If TACNTH is read during a break interrupt, be sure to unlatch TACNTL by
reading TACNTL before exiting the break interrupt. Otherwise, TACNTL
retains the value latched during the break.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
PS[2:0]
000
001
010
011
100
101
110
111
Table 25-1. Prescaler Selection
Table 25-1
NOTE
NOTE
NOTE
shows. Reset clears the PS[2:0] bits.
Internal Bus Clock ÷ 16
Internal Bus Clock ÷ 32
Internal Bus Clock ÷ 64
Internal Bus Clock ÷ 2
Internal Bus Clock ÷ 4
Internal Bus Clock ÷ 8
Internal Bus Clock ÷1
TIMA Clock Source
PTD6/ATD14/TACLK
Freescale Semiconductor