MC68HC908GR8CDW Freescale Semiconductor, MC68HC908GR8CDW Datasheet - Page 132

• Manufacturer Part Number: MC68HC908GR8CDW
• Description: IC MCU 8K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GR8CDW

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 17
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Configuration Register (CONFIG)
Technical Data
132
NOTE:
NOTE:
LVI5OR3 — LVI 5V or 3V Operating Mode Bit
SSREC — Short Stop Recovery Bit
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal oscillator, do not set the SSREC bit.
When the LVISTOP is enabled, the system stabilization time for power
on reset and long stop recovery (both 4096 CGMXCLK cycles) gives a
delay longer than the enable time for the LVI. There is no period where
the MCU is not protected from a low power condition. However, when
using the short stop recovery configuration option, the 32-CGMXCLK
delay is less than the LVI’s turn-on time and there exists a period in
startup where the LVI is not protecting the MCU.
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
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LVI5OR3 selects the voltage operating mode of the LVI module. See
Low-Voltage Inhibit
should match the operating V
LVI’s voltage trip points for each of the modes.
SSREC enables the CPU to exit stop mode with a delay of 32
CGMXCLK cycles instead of a 4096-CGMXCLK cycle delay.
STOP enables the STOP instruction.
COPD disables the COP module. See
(COP).
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1 = LVI operates in 5V mode.
0 = LVI operates in 3V mode.
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLKC cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
Configuration Register (CONFIG)
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(LVI). The voltage mode selected for the LVI
DD
. See
Electrical Specifications
Computer Operating Properly
MC68HC908GR8 — Rev 4.0
MOTOROLA
for the