C8051F062 Silicon Laboratories Inc, C8051F062 Datasheet - Page 67
C8051F062
Manufacturer Part Number
C8051F062
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Specifications of C8051F062
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
59
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN, I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
59
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
12 bit, 2 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No
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Silicon Laboratories Inc
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AINnG
The offset register value affects the offset at the analog input as follows:
The gain register value affects the slope of the ADC transfer function as follows:
AINn
Offset Register (14 Bits)
Gain Register (13 Bits)
0x3FFF
0x1FFF
0x2000
0x0000
0x1000
0x0000
Figure 5.21. Offset and Gain Calibration Block Diagram
Offset Change
Figure 5.20. Offset and Gain Register Mapping
Slope Change
+
Offset
-
0x2000 Offset Register
----------------------------------------------------------- -
Gain Register 0x1000
-------------------------------------------------------- -
Approximate Offset Change (V)
Approximate Slope Change
–
Rev. 1.2
8192
ADCn
VREF
+3.125% * VREF
-3.125% * VREF
4096
+
C8051F060/1/2/3/4/5/6/7
+3.125%
-3.125%
–
0
0
Gain
3.125% VREF
3.125%
16
ADCn Data
67
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