MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 219

• Manufacturer Part Number: MC908AZ32ACFU
• Description: IC MCU 32K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ32ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MSxA — Mode Select Bit A
ELSxB and ELSxA — Edge/Level Select Bits
Freescale Semiconductor
When ELSxB:A ≠ 00, this read/write bit selects either input capture operation or unbuffered output
compare/PWM operation (see
When ELSxB:A = 00, this read/write bit selects the initial output level of the TBCHx pin once PWM,
input capture or output compare operation is enabled (see
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to port F and pin PTFx/TBCHx is
available as a general-purpose I/O pin. However, channel x is at a state determined by these bits and
becomes transparent to the respective pin when PWM, input capture, or output compare mode is
enabled.
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
MSxB:MSxA
Table 19-2
X0
X1
1X
1X
1X
00
00
00
01
01
01
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIMB status and control register (TBSC).
Before enabling a TIMB channel register for input capture operation, make
sure that the PTFx/TBCHx pin is stable for at least two bus clocks.
shows how ELSxB and ELSxA work. Reset clears the ELSxB and ELSxA bits.
ELSxB:ELSxA
Table 19-2. Mode, Edge, and Level Selection
01
10
11
01
10
11
01
10
11
00
00
Table
MC68HC908AZ32A Data Sheet, Rev. 2
19-2).
or Buffered PWM
Output Compare
Output Preset
Input Capture
Compare
Buffered
or PWM
Output
Mode
NOTE
NOTE
Pin under Port Control;
Initialize Timer
Output Level High
Pin under Port Control;
Initialize Timer
Output Level Low
Capture on Rising Edge Only
Capture on Falling Edge Only
Capture on Rising or Falling Edge
Toggle Output on Compare
Clear Output on Compare
Set Output on Compare
Toggle Output on Compare
Clear Output on Compare
Set Output on Compare
Table
19-2). Reset clears the MSxA bit.
Configuration
I/O Registers
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