MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 250

• Manufacturer Part Number: MC908AZ32ACFU
• Description: IC MCU 32K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ32ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

I/O Ports
23.5 Port D
Port D is an 8-bit general-purpose I/O port. Note that PTD7 is only available on 64-pin package options.
23.5.1 Port D Data Register
Port D is a 8-bit special function port that shares seven of its pins with the analog to digital converter and
two with the timer interface modules.
PTD[7:0] — Port D Data Bits
ATD[14:8] — ADC Channel Status Bits
TACLK/TBCLK — Timer Clock Input Bit
250
PTD[7:0] are read/write, software programmable bits. Data direction of PTD[7:0] pins are under the
control of the corresponding bit in data direction register D.
PTD6/ATD14/TACLK–PTD0/ATD8 are seven of the 15 analog-to-digital converter channels. The ADC
channel select bits, CH[4:0], determine whether the PTD6/ATD14/TACLK–PTD0/ATD8 pins are ADC
channels or general-purpose I/O pins. If an ADC channel is selected and a read of this corresponding
bit in the port B data register occurs, the data will be 0 if the data direction for this bit is programmed
as an input. Otherwise, the data will reflect the value in the data latch. (See
Analog-To-Digital Converter
The PTD6/ATD14/TCLK pin is the external clock input for the TIMA. The PTD4/ATD12 pin is the
external clock input for the TIMB. The prescaler select bits, PS[2:0], select PTD6/ATD14/TCLK or
PTD4/ATD12 as the TIM clock input. (See
19.8.4 TIMB Channel Status and Control
PTD6/ATD14/TCLK
selected corresponding DDRD bits have no effect.
Functions:
Address:
Alternate
Data direction register D (DDRD) does not affect the data direction of port
D pins that are being used by the TIMA or TIMB. However, the DDRD bits
always determine whether reading port D returns the states of the latches
or logic 0.
Reset:
Read:
Write:
$0003
and
PTD7
Bit 7
R
PTD4/ATD12 are available for general-purpose I/O. While TACLK/TBCLK are
Figure 23-11. Port D Data Register (PTD)
ATD14/
(ADC-15)).
TACLK
PTD6
6
MC68HC908AZ32A Data Sheet, Rev. 2
ATD13
PTD5
5
Registers). When not selected as the TIM clock,
18.8.4 TIMA Channel Status and Control Registers
NOTE
ATD12/
TBCLK
Unaffected by Reset
PTD4
4
ATD11
PTD3
3
ATD10
PTD2
2
PTD1
ATD9
1
Chapter 21
Freescale Semiconductor
PTD0
ATD8
Bit 0
and