MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 255

• Manufacturer Part Number: MC908AZ32ACFU
• Description: IC MCU 32K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ32ACFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 40
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

23.7 Port F
Port F is a 7-bit special function port that shares four of its pins with the timer interface module (TIMA-6)
and two of its pins with the timer interface module (TIMB) on the MC68HC908AZ32A. Note that PTF4,
PTF5 and PTF6 are only available on 64-pin package options.
23.7.1 Port F Data Register
The port F data register contains a data latch for each of the seven port F pins.
PTF[6:0] — Port F Data Bits
TACH[5:2] — Timer A Channel I/O Bits
TBCH[1:0] — Timer B Channel I/O Bits
Freescale Semiconductor
These read/write bits are software programmable. Data direction of each port F pin is under the control
of the corresponding bit in data direction register F. Reset has no effect on PTF[6:0].
The PTF3/TCH5–PTF0/TCH2 pins are the TIM input capture/output compare pins. The edge/level
select bits, ELSxB:ELSxA, determine whether the PTF3/TCH5–PTF0/TCH2 pins are timer channel I/O
pins or general-purpose I/O pins. (See
The PTF5/TBCH1–PTF4 pins are the TIMB input capture/output compare pins. The edge/level select
bits, ELSxB:ELSxA, determine whether the PTF5/TBCH1–PTF4 pins are timer channel I/O pins or
general-purpose I/O pins. (See
Function:
Address:
Alternate
Data direction register F (DDRF) does not affect the data direction of port F
pins that are being used by the TIM. However, the DDRF bits always
determine whether reading port F returns the states of the latches or the
states of the pins. (See
Reset:
Read:
Write:
$0009
Bit 7
R
R
0
Figure 23-17. Port F Data Register (PTF)
= Reserved
PTF6
6
19.8.1 TIMB Status and Control
MC68HC908AZ32A Data Sheet, Rev. 2
Table
TBCH1
PTF5
18.8.1 TIMA Status and Control
5
23-6).
NOTE
TBCH0
Unaffected by Reset
PTF4
4
TACH5
PTF3
3
Register).
TACH4
PTF2
2
Register).
TACH3
PTF1
1
TACH2
PTF0
Bit 0
Port F
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