MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 271

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MC908AZ32ACFU

Manufacturer Part Number
MC908AZ32ACFU
Description
IC MCU 32K FLASH 8.4MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ32ACFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
40
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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24.7 Protocol Violation Protection
The MSCAN08 will protect the user from accidentally violating the CAN protocol through programming
errors. The protection logic implements the following features:
24.8 Low Power Modes
In addition to normal mode, the MSCAN08 has three modes with reduced power consumption: Sleep, Soft
Reset and Power Down modes. In Sleep and Soft Reset mode, power consumption is reduced by
stopping all clocks except those to access the registers. In Power Down mode, all clocks are stopped and
no power is consumed.
The WAIT and STOP instructions put the MCU in low power consumption stand-by modes. summarizes
the combinations of MSCAN08 and CPU modes. A particular combination of modes is entered for the
given settings of the bits SLPAK and SFTRES. For all modes, an MSCAN wake-up interrupt can occur
only if SLPAK=WUPIE=1.
Freescale Semiconductor
The receive and transmit error counters cannot be written or otherwise manipulated.
All registers which control the configuration of the MSCAN08 can not be modified while the
MSCAN08 is on-line. The SFTRES bit in the MSCAN08 module control register (see
MSCAN08 Module Control Register
The TxCAN pin is forced to recessive when the MSCAN08 is in any of the Low Power Modes.
MSCAN08 module control register 1 (CMCR1)
MSCAN08 bus timing register 0 and 1 (CBTR0 and CBTR1)
MSCAN08 identifier acceptance control register (CIDAC)
MSCAN08 identifier acceptance registers (CIDAR0–3)
MSCAN08 identifier mask registers (CIDMR0–3)
Table 24-1. MSCAN08 Interrupt Vector Addresses
Interrupts
Function
Transmit
Wakeup
Receive
Error
MC68HC908AZ32A Data Sheet, Rev. 2
0) serves as a lock to protect the following registers:
RWRNIF
TWRNIF
RERRIF
TERRIF
BOFFIF
Source
WUPIF
OVRIF
TXE0
TXE1
TXE2
RXF
RWRNIE
TWRNIE
RERRIE
TERRIE
BOFFIE
TXEIE0
TXEIE1
TXEIE2
WUPIE
OVRIE
RXFIE
Local
Mask
Global
Mask
I Bit
Protocol Violation Protection
24.13.1
271

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