MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 47

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MC908AZ32ACFU

Manufacturer Part Number
MC908AZ32ACFU
Description
IC MCU 32K FLASH 8.4MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ32ACFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
40
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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4.5 FLASH Mass Erase Operation
Use this step-by-step procedure to erase the entire FLASH memory to read as logic 1:
4.6 FLASH Page Erase Operation
Use this step-by-step procedure to erase a page (128 bytes) of FLASH memory to read as logic 1:
Freescale Semiconductor
10. Wait for a time, t
10. Wait for a time, t
1. Set both the ERASE bit and the MASS bit in the FLASH Control Register (FLCR).
2. Read the FLASH Block Protect Register (FLBPR).
3. Write to any FLASH address within the FLASH array with any data.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE bit.
8. Wait for a time, t
9. Clear the HVEN bit.
1. Set the ERASE bit and clear the MASS bit in the FLASH Control Register (FLCR).
2. Read the FLASH Block Protect Register (FLBPR).
3. Write any data to any FLASH address within the address range of the page (128 byte block) to be
4. Wait for time, t
5. Set the HVEN bit.
6. Wait for time, t
7. Clear the ERASE bit.
8. Wait for time, t
9. Clear the HVEN bit.
erased.
If the address written to in Step 3 is within address space protected by the
FLASH Block Protect Register (FLBPR), no erase will occur.
A. Programming and erasing of FLASH locations can not be performed by
code being executed from the same FLASH array.
B. While these operations must be performed in the order shown, other
unrelated operations may occur between the steps. Care must be taken
however to ensure that these operations do not access any address within
the FLASH array memory space such as the COP Control Register
(COPCTL) at $FFFF.
C. It is highly recommended that interrupts be disabled during
program/erase operations.
A. Programming and erasing of FLASH locations can not be performed by
code being executed from the same FLASH array.
NVS
ERASE
NVH
NVS
MERASE
RCV
RCV
NVHL
.
.
.
, after which the memory can be accessed in normal read mode.
, after which the memory can be accessed in normal read mode.
.
.
.
MC68HC908AZ32A Data Sheet, Rev. 2
NOTE
NOTE
NOTE
FLASH Mass Erase Operation
47

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