MC908AZ32ACFU Freescale Semiconductor, MC908AZ32ACFU Datasheet - Page 60

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MC908AZ32ACFU

Manufacturer Part Number
MC908AZ32ACFU
Description
IC MCU 32K FLASH 8.4MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ32ACFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
40
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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EEPROM
5.5.4 EEPROM Timebase Divider Register
The 16-bit EEPROM timebase divider register consists of two 8-bit registers: EEDIVH and EEDIVL. The
11-bit value in this register is used to configure the timebase divider circuit to obtain the 35 μs timebase
for EEPROM control.
These two read/write registers are respectively loaded with the contents of the EEPROM timebase divider
onvolatile registers (EEDIVHNVR and EEDIVLNVR) after a reset.
EEDIVSECD — EEPROM Divider Security Disable
EEDIV[10:0] — EEPROM timebase prescaler
The EEDIV value is calculated by the following formula:
Where the result inside the bracket is rounded down to the nearest integer value
For example, if the reference frequency is 4.9152MHz, the EEDIV value is 172
60
This bit enables/disables the security feature of the EEDIV registers. When EEDIV security feature is
enabled, the state of the registers EEDIVH and EEDIVL are locked (including EEDIVSECD bit). The
EEDIVHNVR and EEDIVLNVR nonvolatile memory registers are also protected from being
erased/programmed.
These prescaler bits store the value of EEDIV which is used as the divisor to derive a timebase of 35μs
from the selected reference clock source (CGMXCLK or bus block in the CONFIG-2 register) for the
EEPROM related internal timer and circuits. EEDIV[10:0] bits are readable at any time. They are
writable when EELAT = 0 and EEDIVSECD = 1.
EEDIV= INT[Reference Frequency(Hz) x 35 x10
1 = EEDIV security feature disabled
0 = EEDIV security feature enabled
Address:
Address:
Programming/erasing the EEPROM with an improper EEDIV value may
result in data lost and reduce endurance of the EEPROM device.
Reset:
Reset:
Read:
Read:
Write:
Write:
EEDIVS-
EEDIV7
$FE1A
$FE1B
ECD
Bit 7
Bit 7
Figure 5-5. EEDIV Divider High Register (EEDIVH)
Figure 5-6. EEDIV Divider Low Register (EEDIVL)
= Unimplemented
EEDIV6
6
0
6
MC68HC908AZ32A Data Sheet, Rev. 2
EEDIV5
Contents of EEDIVHNVR ($FE10), Bits [6:3] = 0
5
0
5
Contents of EEDIVLNVR ($FE11)
NOTE
EEDIV4
-6
4
0
4
+0.5]
EEDIV3
3
0
3
EEDIV10
EEDIV2
2
2
EEDIV9
EEDIV1
1
1
Freescale Semiconductor
EEDIV8
EEDIV0
Bit 0
Bit 0

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