HD6412332VFCBL25 Renesas Electronics America, HD6412332VFCBL25 Datasheet - Page 114
HD6412332VFCBL25
Manufacturer Part Number
HD6412332VFCBL25
Description
IC H8S MCU ROMLESS 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of HD6412332VFCBL25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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Section 2 Instruction Descriptions
2.2.26 (1)
DEC (DECrement)
Operation
Rd – 1
Assembly-Language Format
DEC.B Rd
Operand Size
Byte
Description
This instruction decrements an 8-bit register Rd (destination operand) and stores the result in the
8-bit register Rd.
Available Registers
Rd: R0L to R7L, R0H to R7H
Operand Format and Number of States Required for Execution
Notes
An overflow is caused by the operation H'80 – 1
Rev. 4.00 Feb 24, 2006 page 98 of 322
REJ09B0139-0400
Register direct
Addressing
Mode
Rd
DEC (B)
Mnemonic
DEC.B
Operands
Rd
1st byte
1
A
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Previous value remains unchanged.
H'7F.
2nd byte
0
Instruction Format
cleared to 0.
cleared to 0.
cleared to 0.
—
I
rd
UI H
—
—
3rd byte
—
U
N
4th byte
Z
V
Decrement
—
States
No. of
C
1
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