HD64F2134FA20 Renesas Electronics America, HD64F2134FA20 Datasheet - Page 202

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HD64F2134FA20

Manufacturer Part Number
HD64F2134FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of HD64F2134FA20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Manufacturer
Quantity
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Part Number:
HD64F2134FA20
Manufacturer:
Renesas Electronics America
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10 000
Part Number:
HD64F2134FA20V
Manufacturer:
RENESAS
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Section 6 Bus Controller
6.4
6.4.1
The basic bus interface enables direct connection of ROM, SRAM, and so on.
The bus specifications can be selected with the AST bit, and the WMS1, WMS0, WC1, and WC0
bits (see table 6.3).
6.4.2
Data sizes for the CPU and other internal bus masters are byte, word, and longword. The bus
controller has a data alignment function, and when accessing external space, controls whether the
upper data bus (D15 to D8) or lower data bus (D7 to D0) is used according to the bus
specifications for the area being accessed (8-bit access space or 16-bit access space) and the data
size.
These group only have an upper data bus, and only 8-bit access space alignment is used. In these
group, the upper data bus pins are designated D7 to D0.
8-Bit Access Space: Figure 6.3 illustrates data alignment control for the 8-bit access space. With
the 8-bit access space, the upper data bus (D15 to D8) is always used for accesses. The amount of
data that can be accessed at one time is one byte: a word access is performed as two byte accesses,
and a longword access, as four byte accesses.
Rev. 4.00 Jun 06, 2006 page 146 of 1004
REJ09B0301-0400
Byte size
Word size
Longword size
Basic Bus Interface
Overview
Data Size and Data Alignment
Figure 6.3 Access Sizes and Data Alignment Control (8-Bit Access Space)
1st bus cycle
2nd bus cycle
1st bus cycle
2nd bus cycle
3rd bus cycle
4th bus cycle
D15
Upper data bus
D8 D7
Lower data bus
D0

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