HD64F3684FP Renesas Electronics America, HD64F3684FP Datasheet - Page 107

• Manufacturer Part Number: HD64F3684FP
• Description: IC H8 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3684FP

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

5.2.2
When the subclock is not used, connect pin X
figure 5.10.
5.3
5.3.1
Prescaler S is a 13-bit counter using the system clock (ø) as its input clock. It is incremented once
per clock period. Prescaler S is initialized to H'0000 by a reset, and starts counting on exit from
the reset state. In standby mode, subactive mode, and subsleep mode, the system clock pulse
generator stops. Prescaler S also stops and is initialized to H'0000. The CPU cannot read or write
prescaler S. The output from prescaler S is shared by the on-chip peripheral modules. The divider
ratio can be set separately for each on-chip peripheral function. In active mode and sleep mode,
the clock input to prescaler S is determined by the division factor designated by MA2 to MA0 in
SYSCR2.
5.3.2
Prescaler W is a 5-bit counter using a 32.768 kHz signal divided by 4 (ø
divided output is used for clock time base operation of timer A. Prescaler W is initialized to H'00
by a reset, and starts counting on exit from the reset state. Even in standby mode, subactive mode,
or subsleep mode, prescaler W continues functioning so long as clock signals are supplied to pins
X
1
and X
2
.
Pin Connection when Not Using Subclock
Prescalers
Prescaler S
Prescaler W
Figure 5.10 Pin Connection when not Using Subclock
X
X
1
2
1
to V
CL
or V
SS
and leave pin X
Open
Rev.5.00 Nov. 02, 2005 Page 73 of 500
V
CL
or V
Section 5 Clock Pulse Generators
SS
W
/4) as its input clock. The
2
open, as shown in
REJ09B0027-0500