HD64F3684FP Renesas Electronics America, HD64F3684FP Datasheet - Page 19

• Manufacturer Part Number: HD64F3684FP
• Description: IC H8 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3684FP

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 17 I
17.1 Features.............................................................................................................................. 303
17.2 Input/Output Pins ............................................................................................................... 305
17.3 Register Descriptions ......................................................................................................... 305
17.4 Operation ........................................................................................................................... 318
17.5 Interrupt Request................................................................................................................ 334
17.6 Bit Synchronous Circuit..................................................................................................... 335
17.7 Usage Notes ....................................................................................................................... 336
Section 18 A/D Converter..................................................................................337
18.1 Features.............................................................................................................................. 337
18.2 Input/Output Pins ............................................................................................................... 339
18.3 Register Descriptions ......................................................................................................... 340
18.4 Operation ........................................................................................................................... 343
16.8.4 Receive Data Sampling Timing and Reception
17.3.1 I
17.3.2 I
17.3.3 I
17.3.4 I
17.3.5 I
17.3.6 Slave Address Register (SAR).............................................................................. 316
17.3.7 I
17.3.8 I
17.3.9 I
17.4.1 I
17.4.2 Master Transmit Operation ................................................................................... 319
17.4.3 Master Receive Operation..................................................................................... 321
17.4.4 Slave Transmit Operation ..................................................................................... 323
17.4.5 Slave Receive Operation....................................................................................... 325
17.4.6 Clocked Synchronous Serial Format..................................................................... 327
17.4.7 Noise Canceler...................................................................................................... 329
17.4.8 Example of Use..................................................................................................... 330
17.7.1 Issue (Retransmission) of Start/Stop Conditions .................................................. 336
17.7.2 WAIT Setting in I
18.3.1 A/D Data Registers A to D (ADDRA to ADDRD) .............................................. 340
18.3.2 A/D Control/Status Register (ADCSR) ................................................................ 341
18.3.3 A/D Control Register (ADCR) ............................................................................. 342
18.4.1 Single Mode.......................................................................................................... 343
Margin in Asynchronous Mode ............................................................................ 301
2
2
2
2
2
2
2
2
2
2
C Bus Control Register 1 (ICCR1)..................................................................... 306
C Bus Control Register 2 (ICCR2)..................................................................... 308
C Bus Mode Register (ICMR)............................................................................ 309
C Bus Interrupt Enable Register (ICIER) ........................................................... 311
C Bus Status Register (ICSR)............................................................................. 313
C Bus Transmit Data Register (ICDRT)............................................................. 317
C Bus Receive Data Register (ICDRR).............................................................. 317
C Bus Shift Register (ICDRS)............................................................................ 317
C Bus Format...................................................................................................... 318
C Bus Interface 2 (IIC2) ................................................................303
2
C Bus Mode Register (ICMR) ................................................ 336
Rev.5.00 Nov. 02, 2005 Page xvii of xxxii