HD64F3684FP Renesas Electronics America, HD64F3684FP Datasheet - Page 25

• Manufacturer Part Number: HD64F3684FP
• Description: IC H8 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3684FP

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Figure 12.2 Increment Timing with Internal Clock .................................................................... 167
Figure 12.3 Increment Timing with External Clock ................................................................... 167
Figure 12.4 OVF Set Timing ...................................................................................................... 167
Figure 12.5 CMFA and CMFB Set Timing ................................................................................ 168
Figure 12.6 TMOV Output Timing ............................................................................................ 168
Figure 12.7 Clear Timing by Compare Match............................................................................ 168
Figure 12.8 Clear Timing by TMRIV Input ............................................................................... 169
Figure 12.9 Pulse Output Example ............................................................................................. 170
Figure 12.10 Example of Pulse Output Synchronized to TRGV Input....................................... 171
Figure 12.11 Contention between TCNTV Write and Clear ...................................................... 172
Figure 12.12 Contention between TCORA Write and Compare Match ..................................... 173
Figure 12.13 Internal Clock Switching and TCNTV Operation ................................................. 173
Section 13 Timer Z
Figure 13.1 Timer Z Block Diagram .......................................................................................... 177
Figure 13.2 Timer Z (Channel 0) Block Diagram ...................................................................... 178
Figure 13.3 Timer Z (Channel 1) Block Diagram ...................................................................... 179
Figure 13.4 Example of Outputs in Reset Synchronous PWM Mode
and Complementary PWM Mode............................................................................ 186
Figure 13.5 Accessing Operation of 16-Bit Register (between CPU and TCNT (16 bits)) ........ 197
Figure 13.6 Accessing Operation of 8-Bit Register (between CPU and TSTR (8 bits))............. 198
Figure 13.7 Example of Counter Operation Setting Procedure .................................................. 199
Figure 13.8 Free-Running Counter Operation ............................................................................ 200
Figure 13.9 Periodic Counter Operation..................................................................................... 201
Figure 13.10 Count Timing at Internal Clock Operation............................................................ 201
Figure 13.11 Count Timing at External Clock Operation (Both Edges Detected)...................... 202
Figure 13.12 Example of Setting Procedure for Waveform Output by Compare Match............ 203
Figure 13.13 Example of 0 Output/1 Output Operation ............................................................. 204
Figure 13.14 Example of Toggle Output Operation ................................................................... 205
Figure 13.15 Output Compare Timing........................................................................................ 206
Figure 13.16 Example of Input Capture Operation Setting Procedure ....................................... 207
Figure 13.17 Example of Input Capture Operation..................................................................... 208
Figure 13.18 Input Capture Signal Timing ................................................................................. 209
Figure 13.19 Example of Synchronous Operation Setting Procedure ........................................ 210
Figure 13.20 Example of Synchronous Operation...................................................................... 211
Figure 13.21 Example of PWM Mode Setting Procedure .......................................................... 212
Figure 13.22 Example of PWM Mode Operation (1) ................................................................. 213
Figure 13.23 Example of PWM Mode Operation (2) ................................................................. 214
Figure 13.24 Example of PWM Mode Operation (3) ................................................................. 215
Figure 13.25 Example of PWM Mode Operation (4) ................................................................. 216
Figure 13.26 Example of Reset Synchronous PWM Mode Setting Procedure........................... 218
Rev.5.00 Nov. 02, 2005 Page xxiii of xxxii