HD64F3684FP Renesas Electronics America, HD64F3684FP Datasheet - Page 262

• Manufacturer Part Number: HD64F3684FP
• Description: IC H8 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3684FP

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 13 Timer Z
When the counter is incremented or decremented, the IMFA flag of channel 0 is set to 1, and when
the register is underflowed, the UDF flag of channel 0 is set to 1. After buffer operation has been
designated for BR, BR is transferred to GR when the counter is incremented by compare match
A0 or when TCNT_1 is underflowed. If the or /2 clock is selected by TPSC2 to TPSC0 bits,
the OVF flag is not set to 1 at the timing that the counter value changes from H'FFFF to H'0000. If
the /4 or /8 clock is selected by TPSC2 to TPSC0 bits, the OVF flag is set to 1.
3. Setting GR Value in Complementary PWM Mode: To set the general register (GR) or modify
Rev.5.00 Nov. 02, 2005 Page 228 of 500
REJ09B0027-0500
GR during operation in complementary PWM mode, refer to the following notes.
A. Initial value
B. Modifying the setting value
C. Outputting a waveform with a duty cycle of 0% and 100%
a. When other than TPSC2 = TPSC1 = TPSC0 = 0, the GRA_0 value must be equal to
b. H'0000 to T – 1 (T: Initial value of TCNT0) must not be set for the initial value.
c. GRA_0 – (T – 1) or more must not be set for the initial value.
d. When using buffer operation, the same values must be set in the buffer registers and
a. Writing to GR directly must be performed while the TCNT_1 and TCNT_0 values
b. Do not write the following values to GR directly. When writing the values, a waveform
c. Do not change settings of GRA_0 during operation.
a. Buffer operation is not used and TPSC2 = TPSC1 = TPSC0 = 0
H'FFFC or less. When TPSC2 = TPSC1 = TPSC0 = 0, the GRA_0 value can be set to
H'FFFF or less.
corresponding general registers.
should satisfy the following expression: H'0000
previous GR value < TCNT_0 GRA_0. Otherwise, a waveform is not output
correctly. For details on outputting a waveform with a duty cycle of 0% and 100%, see
C., Outputting a waveform with a duty cycle of 0% and 100%.
is not output correctly.
H'0000 GR T 1 and GRA_0 (T 1) GR < GRA_0 when TPSC2 = TPSC1 =
TPSC0 = 0
H'0000 < GR T 1 and GRA_0 (T 1)
= TPSC0 = 0
Write H'0000 or a value equal to or more than the GRA_0 value to GR directly at the
timing shown below.
To output a 0%-duty cycle waveform, write a value equal to or more than the GRA_0
value while H'0000 TCNT_1 < previous GR value
To output a 100%-duty cycle waveform, write H'0000 while previous GR value<
TCNT_0 GRA_0
GR < GRA_0 + 1 when TPSC2 = TPSC1
TCNT_1 < previous GR value, and