HD64F3684FP Renesas Electronics America, HD64F3684FP Datasheet - Page 58

IC H8 MCU FLASH 32K 64LQFP

HD64F3684FP

Manufacturer Part Number
HD64F3684FP
Description
IC H8 MCU FLASH 32K 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3684FP

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 2 CPU
Table 2.3
Note:
Rev.5.00 Nov. 02, 2005 Page 24 of 500
REJ09B0027-0500
Instruction
ADD
SUB
ADDX
SUBX
INC
DEC
ADDS
SUBS
DAA
DAS
MULXU
MULXS
DIVXU
*
efers to the operand size.
B: Byte
W: Word
L: Longword
Arithmetic Operations Instructions (1)
Size*
B/W/L
B
B/W/L
L
B
B/W
B/W
B/W
Function
Rd ± Rs
Performs addition or subtraction on data in two general registers, or on
immediate data and data in a general register (immediate byte data
cannot be subtracted from byte data in a general register. Use the
SUBX or ADD instruction.)
Rd ± Rs ± C
Performs addition or subtraction with carry on byte data in two general
registers, or on immediate data and data in a general register.
Rd ± 1
Increments or decrements a general register by 1 or 2. (Byte operands
can be incremented or decremented by 1 only.)
Rd ± 1
Adds or subtracts the value 1, 2, or 4 to or from data in a 32-bit register.
Rd (decimal adjust)
Decimal-adjusts an addition or subtraction result in a general register by
referring to the CCR to produce 4-bit BCD data.
Rd
Performs unsigned multiplication on data in two general registers: either
8 bits
Rd
Performs signed multiplication on data in two general registers: either 8
bits
Rd ÷ Rs
Performs unsigned division on data in two general registers: either 16
bits ÷ 8 bits
16-bit quotient and 16-bit remainder.
Rs
Rs
8 bits
8 bits
Rd, Rd ± 2
Rd, Rd ± 2
Rd, Rd ± #IMM
Rd
Rd
Rd
16 bits or 16 bits
8-bit quotient and 8-bit remainder or 32 bits ÷ 16 bits
Rd, Rd ± #IMM ± C
16 bits or 16 bits
Rd
Rd
Rd, Rd ± 4
Rd
16 bits
16 bits
Rd
Rd
32 bits.
32 bits.

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