MC68L11E1FNE2 Freescale Semiconductor, MC68L11E1FNE2 Datasheet - Page 96
MC68L11E1FNE2
Manufacturer Part Number
MC68L11E1FNE2
Description
IC MCU 8BIT 2MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet
1.MC711E9CFNE2R.pdf
(242 pages)
Specifications of MC68L11E1FNE2
Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Size
-
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Resets and Interrupts
masked), the MCU starts up, beginning with the stacking sequence leading to normal service of the XIRQ
request. If X is set to 1 (XIRQ masked or inhibited), then processing continues with the instruction that
immediately follows the STOP instruction, and no XIRQ interrupt service is requested or pending.
Because the oscillator is stopped in stop mode, a restart delay may be imposed to allow oscillator
stabilization upon leaving stop. If the internal oscillator is being used, this delay is required; however, if a
stable external oscillator is being used, the DLY control bit can be used to bypass this startup delay. The
DLY control bit is set by reset and can be optionally cleared during initialization. If the DLY equal to 0
option is used to avoid startup delay on recovery from stop, then reset should not be used as the means
of recovering from stop, as this causes DLY to be set again by reset, imposing the restart delay. This same
delay also applies to power-on reset, regardless of the state of the DLY control bit, but does not apply to
a reset while the clocks are running.
M68HC11E Family Data Sheet, Rev. 5.1
96
Freescale Semiconductor
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