MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 57
![IC MCU 8BIT 1K RAM 68-PLCC](/photos/12/45/124584/mchc11f1cfne3_sml.jpg)
MCHC11F1CFNE3
Manufacturer Part Number
MCHC11F1CFNE3
Description
IC MCU 8BIT 1K RAM 68-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Specifications of MCHC11F1CFNE3
Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
30
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
A/d Inputs
8-Channel, 8-Bit
Eeprom Memory
512 Bytes
Input Output
30
Interface
SCI/SPI
Memory Type
EPROM
Number Of Bits
8
Package Type
68-pin PLCC
Programmable Memory
0 Bytes
Timers
3-16-bit
Voltage, Range
3-5.5 V
Controller Family/series
68HC11
No. Of I/o's
30
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
3MHz
No. Of Timers
1
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC11F
Core
HC11
Data Bus Width
8 bit
Program Memory Size
512 B
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Size
-
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCHC11F1CFNE3
Manufacturer:
FREESCALE
Quantity:
5 530
Company:
Part Number:
MCHC11F1CFNE3
Manufacturer:
FREESCALE
Quantity:
5 530
Company:
Part Number:
MCHC11F1CFNE3
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MCHC11F1CFNE3R
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
4.5.3 General-Purpose Chip Select
TECHNICAL DATA
$FFFF
$C000
$E000
$FE00
$0000
$1000
$8000
The general-purpose chip select (CSGEN) is the most flexible and has the most con-
trol bits. Polarity of the active state, E-valid or address-valid timing, size, starting ad-
dress, and clock delay are all programmable.
A single bit in CSCTL selects a priority between CSGEN and CSPROG. Bits in CSG-
SIZ select between address valid or E-clock valid timing, determine the polarity of the
active state and the address range of CSGEN. The value contained in the CSGADR
register determines the starting address for CSGEN. Depending on the size selected
for CSGEN, some bits in CSGADR will be invalid (don’t cares). Note that CSGEN is
disabled when a size of zero is selected. Refer to Figure 4-4.
EXPANDED
MODE
Figure 4-3 Address Map for I/O and Program Chip Selects
x000
x05F
x060
x7FF
x800
xFFF
Freescale Semiconductor, Inc.
OPERATING MODES AND ON-CHIP MEMORY
For More Information On This Product,
96-BYTE REGISTER
BLOCK
I/O CHIP SELECT 1
(CSIO1)
I/O CHIP SELECT 2
(CSIO2)
Go to: www.freescale.com
REMAPPABLE TO
4-KBYTE BOUNDARY
0000
8000
C000
E000
FFFF
PSIZ[A:B] = 0:0
64K
PSIZ[A:B] = 0:1
32K
PSIZ[A:B] = 1:0
16K
PSIZ[A:B] = 1:1
8K
PROGRAM CHIP SELECT
(CSPROG)
FFC0
FFFF
VECTORS
4-19