MC908QL4MDTE Freescale Semiconductor, MC908QL4MDTE Datasheet - Page 180
MC908QL4MDTE
Manufacturer Part Number
MC908QL4MDTE
Description
IC MCU 8BIT 4K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QL3VDTE.pdf
(226 pages)
Specifications of MC908QL4MDTE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN (Local Interconnect Network)
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Timer Interface Module (TIM)
15.7.1 TIM Channel I/O Pins (TCH1:TCH0)
Each channel I/O pin is programmable independently as an input capture pin or an output compare pin.
TCH0
15.7.2 TIM Clock Pin (TCLK)
TCLK is an external clock input that can be the clock source for the counter instead of the prescaled
internal bus clock. Select the TCLK input by writing 1s to the three prescaler select bits, PS[2:0]. The
minimum TCLK pulse width is specified in the Timer Interface Module Characteristics table in the
Electricals section. The maximum TCLK frequency is the least of 4 MHz or bus frequency ÷ 2.
15.8 Registers
The following registers control and monitor operation of the TIM:
15.8.1 TIM Status and Control Register
The TIM status and control register (TSC) does the following:
TOF — TIM Overflow Flag Bit
180
•
•
•
•
•
•
•
•
•
•
This read/write flag is set when the counter reaches the modulo value programmed in the TIM counter
modulo registers. Clear TOF by reading the TSC register when TOF is set and then writing a 0 to TOF.
If another TIM overflow occurs before the clearing sequence is complete, then writing 0 to TOF has no
effect. Therefore, a TOF interrupt request cannot be lost due to inadvertent clearing of TOF. Writing a
1 to TOF has no effect.
1 = Counter has reached modulo value
0 = Counter has not reached modulo value
can be configured as buffered output compare or buffered PWM pin.
TIM status and control register (TSC)
TIM control registers (TCNTH:TCNTL)
TIM counter modulo registers (TMODH:TMODL)
TIM channel status and control registers (TSC0 and TSC1)
TIM channel registers (TCH0H:TCH0L and TCH1H:TCH1L)
Enables TIM overflow interrupts
Flags TIM overflows
Stops the counter
Resets the counter
Prescales the counter clock
Reset:
Read:
Write:
Bit 7
TOF
0
0
Figure 15-4. TIM Status and Control Register (TSC)
= Unimplemented
TOIE
6
0
MC68HC908QL4 Data Sheet, Rev. 8
TSTOP
5
1
TRST
0
4
0
3
0
0
PS2
2
0
PS1
1
0
Freescale Semiconductor
Bit 0
PS0
0
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