DF2315VTE25 Renesas Electronics America, DF2315VTE25 Datasheet - Page 231
DF2315VTE25
Manufacturer Part Number
DF2315VTE25
Description
MCU 3V 384K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2315VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2315VTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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7.3.2
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. An interrupt becomes a DTC activation source when the corresponding bit is set to 1, and a
CPU interrupt source when the bit is cleared to 0.
At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. Table 7.4 shows activation source and
DTCER clearance. The activation source flag, in the case of RXI0, for example, is the RDRF flag
of SCI0.
Table 7.4
Activation Source
Software activation
Interrupt activation
Figure 7.3 shows a block diagram of activation source control. For details see section 5, Interrupt
Controller.
Activation Sources
Activation Source and DTCER Clearance
When the DISEL Bit Is 0 and
the Specified Number of
Transfers Have Not Ended
The SWDTE bit is cleared to 0
•
•
The corresponding DTCER
bit remains set to 1
The activation source flag is
cleared to 0
Rev.7.00 Feb. 14, 2007 page 197 of 1108
When the DISEL Bit Is 1, or when
the Specified Number of Transfers
Have Ended
•
•
•
•
•
The SWDTE bit remains set to 1
An interrupt is issued to the CPU
The corresponding DTCER bit is
cleared to 0
The activation source flag remains
set to 1
A request is issued to the CPU for
the activation source interrupt
Section 7 Data Transfer Controller
REJ09B0089-0700
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