DF2315VTE25 Renesas Electronics America, DF2315VTE25 Datasheet - Page 385
DF2315VTE25
Manufacturer Part Number
DF2315VTE25
Description
MCU 3V 384K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2315VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2315VTE25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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9.4.4
Buffer operation, provided for channels 0 and 3, enables TGRC and TGRD to be used as buffer
registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or as a compare match register.
Table 9.5 shows the register combinations used in buffer operation.
Table 9.5
Channel
0
3
• When TGR is an output compare register
Buffer register
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 9.16.
Buffer Operation
Register Combinations in Buffer Operation
Timer General Register
TGR0A
TGR0B
TGR3A
TGR3B
Figure 9.16 Compare Match Buffer Operation
Compare match signal
Timer general
register
Rev.7.00 Feb. 14, 2007 page 351 of 1108
Section 9 16-Bit Timer Pulse Unit (TPU)
Comparator
Buffer Register
TGR0C
TGR0D
TGR3C
TGR3D
REJ09B0089-0700
TCNT
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