MC9S12XD256VAG Freescale Semiconductor, MC9S12XD256VAG Datasheet - Page 1138

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MC9S12XD256VAG

Manufacturer Part Number
MC9S12XD256VAG
Description
IC MCU 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XD256VAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
14K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)
27.4.2.5
The mass erase operation will erase all addresses in a Flash block using an embedded algorithm.
An example flow to execute the mass erase operation is shown in
write sequence is as follows:
If a Flash block to be erased contains any protected area, the PVIOL flag in the FSTAT register will set and
the mass erase command will not launch. Once the mass erase command has successfully launched, the
CCIF flag in the FSTAT register will set after the mass erase operation has completed unless a new
command write sequence has been buffered.
1140
1. Write to a Flash block address to start the command write sequence for the mass erase command.
2. Write the mass erase command, 0x41, to the FCMD register.
3. Clear the CBEIF flag in the FSTAT register by writing a 1 to CBEIF to launch the mass erase
The address and data written will be ignored. Multiple Flash blocks can be simultaneously mass
erased by writing to the same relative address in each Flash block.
command.
Mass Erase Command
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure
27-30. The mass erase command
Freescale Semiconductor

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